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Thyristor

Model thyristor using NPN and PNP transistors

Library

Semiconductor Devices

Description

The Thyristor block represents a system-level thyristor model that can be parameterized from a typical datasheet. The thyristor model is built from a pair of NPN and PNP bipolar transistors, as shown in the following illustration.

The P-N-P-N structure of a thyristor is matched by the P-N-P and N-P-N structures of the bipolar transistors, the base of each device being connected to the collector of the other device. Ensuring that this circuit behaves like a thyristor is primarily picking suitable parameter values of the NPN and PNP devices, plus external resistors. For example, for the circuit to latch into the on-state, once triggered by a suitable gate current, the total gain of the two transistors must be greater than one. This model structure replicates the behavior of a thyristor in typical application circuits, while at the same time presenting a minimum number of equations to the solver, to improve simulation speed.

The model captures the following thyristor behaviors:

• Off-state currents, IDRM and IRRM. These are typically quoted for the maximum off-state voltages VDRM and VRRM. It is assumed, as is the case for most thyristors, that IDRM = IRRM and VDRM = VRRM.

• The gate trigger voltage is equal to the Gate trigger voltage, v_GT parameter value when the gate current is equal to the Gate trigger current, i_GT parameter value.

• The thyristor latches on when the gate current is equal to the Gate trigger current, i_GT. The thyristor does not latch on until the gate current reaches this value. To ensure this is the case, you must set the Internal shunt resistor, Rs parameter correctly. If the resistance is too high, then the gate triggers before the gate current reaches iGT. If the resistance is too small, then the gate does not trigger.

You can determine the value of the internal shunt resistor Rs by running the simulation. To see how this can be done, refer to the Thyristor Static Behavior ValidationThyristor Static Behavior Validation example. Alternatively, if you are using the thyristor in a circuit where there is an external resistor RGK connected from gate to cathode, then the effect of Rs is usually very small, and it can be set to inf.

• With the thyristor in the on-state, if the gate current is removed, the thyristor stays in the on-state, provided that the load current is higher than the latching current. You do not specify the latching current directly because its value is primarily determined by other block parameters.

However, the latching current can be influenced by the Product of NPN and PNP forward current gains parameter on the Advanced tab. Reducing the gain increases the latching current.

• The on-state voltage is equal to the On-state voltage, V_T parameter value when the load current is equal to the On-state current, I_T parameter value. This is ensured by the R_on resistance value, which takes into account the voltage drop seen across the PNP and NPN devices.

• Triggering by rate of rise of off-state voltage. A rapid change in anode-cathode voltage induces a current in the base-collector capacitance terms. If this current is large enough, it triggers the thyristor into the on-state. The thyristor initialization routine calculates a suitable value for the base-collector capacitance, so that when the rate of change of voltage is equal to the Critical rate of rise of off-state voltage, dV/dt parameter value, the thyristor triggers on. This calculation is based on the approximation that the required current is vGT / RGK where RGK is the gate-cathode resistance value used when quoting the critical dV/dt value.

• A nonzero gate-controlled turn-on time. This is primarily influenced by the NPN transistor forward transit time, TF. You either specify this parameter directly, or calculate an approximate value for TF from the turn-on time.

• A nonzero commuted turn-off time. This is primarily influenced by the PNP transistor forward transit time, TF. You can either specify this parameter directly, or set it to be equal to the forward transit time for the NPN transistor.

Resistors Gmin1 and Gmin2 improve numerical robustness at large forward and reverse voltages. Their values influence the off-state currents by no more than 1% at the maximum off-state forward and reverse voltages.

Thermal Port

The block has an optional thermal port, hidden by default. To expose the thermal port, right-click the block in your model, and then from the context menu select Simscape block choices > Show thermal port. This action displays the thermal port H on the block icon, and adds the Thermal port tab to the block dialog box.

Use the thermal port to simulate the effects of generated heat and device temperature. For more information on using thermal ports and on the Thermal port tab parameters, see Simulating Thermal Effects in Semiconductors.

Basic Assumptions and Limitations

The Thyristor block has the following limitations:

• This block does not model temperature-dependent effects. SimElectronics® simulates the block at the temperature at which the component behavior was measured, as specified by the Measurement temperature parameter value. All parameters must be quoted for this temperature.

• In sensitive gate circuits (that is, where there is no external gate-cathode resistor RGK), you must set the value of the Internal shunt resistor, Rs parameter to ensure correct triggering. If the internal shunt resistance is too high, then the thyristor triggers for currents less than iGT. If the internal shunt resistance is too low, the thyristor does not trigger for an input current of iGT. For details on using simulation to determine the acceptable internal shunt resistance value, see the Thyristor Static Behavior ValidationThyristor Static Behavior Validation example.

• Triggering by exceeding the break-over voltage is not modeled.

• Numerically the thyristor can be demanding to simulate, given the very small gate currents in comparison to the load current, and also the very steep current gradients during switching. However, for most typical thyristor-based circuits, you can use the default simulation parameters. In some cases you may need to tighten the Absolute Tolerance and Relative Tolerance parameters on the Solver tab of the Configuration Parameters dialog box, to ensure convergence. In such cases, changing the default value of Absolute Tolerance from auto to 1e-4 or 1e-5 is usually sufficient, because it prevents adaptive changing of this parameter during simulation.

Dialog Box and Parameters

Main Tab

On-state voltage, V_T

The anode-cathode static voltage drop when in the on-state, and the current flowing is equal to the on-state current IT. The default value is 1.2 V.

On-state current, I_T

Static load (or equivalently anode) current that flows when the anode-cathode voltage is equal to the on-state voltage VT. The default value is 1 A.

Off-state current, I_DRM

The off-state anode current IDRM that flows when the anode-cathode voltage is equal to the off-state voltage VDRM. The default value is 0.01 mA.

Corresponding off-state voltage, V_DRM

Corresponding off-state voltage, VDRM. The anode-cathode voltage VDRM applied with the thyristor in the off-state when quoting the off-state current IDRM. The default value is 400 V.

Measurement temperature

The device simulation temperature. You must specify all block parameter values for this temperature. The default value is 25 °C.

Gate Triggering Tab

Gate trigger current, I_GT

Critical gate current iGT required to turn the transistor on, resulting in a gate voltage equal to the gate trigger voltage vGT. You must set the value of the Internal shunt resistor, Rs parameter on the Advanced tab to ensure that the gate triggers at iGT, and not for currents less that iGT. The default value is 3 μA.

Corresponding gate voltage, V_GT

Gate-cathode voltage vGT when the gate current is equal to the gate trigger current iGT. The default value is 0.6 V.

Test voltage, V_D

Supply voltage used when quoting values for vGT and iGT. The default value is 12 V.

Load resistor used when quoting values for vGT and iGT. The default value is 120 Ω.

dV/dt Triggering Tab

Critical rate of rise of off-state voltage, dV/dt

Rate at which the off-state anode-cathode voltage must be increased for the thyristor to turn on. The default value is 150 V/μs.

Test gate-cathode resistor, R_GK

Gate-cathode resistor used when quoting the critical rate of rise off off-state voltage. The default value is 1 KΩ.

Time Constants Tab

NPN device forward transit time parameterization

Select one of the following options:

• Derive approximate value from gate-controlled turn-on time — The block calculates the NPN device forward transit time based on the values for the gate-controlled turn-on time and corresponding gate current that you specify.

• Specify directly — Provide the value directly by using the NPN device forward transit time parameter.

Gate-controlled turn-on time

Time for the gate to turn from the off to the on state when a gate current is applied. This parameter is visible only when you select Derive approximate value from gate-controlled turn-on time for NPN device forward transit time parameterization. The default value is 2 μs.

Corresponding gate current

The gate current used when quoting the gate-controlled turn-on time. The gate current and turn-on time are used to calculate an approximate value for the NPN transistor forward transit time on the assumption that all of the input charge is used to raise the gate voltage to the gate trigger voltage vGT. This parameter is visible only when you select Derive approximate value from gate-controlled turn-on time for NPN device forward transit time parameterization. The default value is 10 mA.

NPN device forward transit time

Represents the mean time for the minority carriers to cross the base region from the emitter to the collector of the NPN device [1]. This parameter is visible only when you select Specify directly for NPN device forward transit time parameterization. The default value is 0.3 μs.

PNP device forward transit time parameterization

Select one of the following options:

• Set equal to NPN device forward transit time — The block uses the NPN device forward transit time value.

• Specify directly — Provide the value directly by using the PNP device forward transit time parameter.

PNP device forward transit time

Represents the mean time for the minority carriers to cross the base region from the emitter to the collector of the PNP device [1]. This parameter is visible only when you select Specify directly for PNP device forward transit time parameterization. The default value is 0.3 μs.

Internal shunt resistor, Rs

Represents the gate-cathode shunt resistance. It is important to set this parameter value to ensure that the gate triggers at iGT, and not for currents less that iGT. For details, see the Thyristor Static Behavior ValidationThyristor Static Behavior Validation example. If you are using the thyristor in a circuit where there is an external gate-cathode resistor RGK, then usually the effect of Rs is small, and it can be set to inf. The default value is 87 kΩ.

Internal series gate resistor, Rg

Represents the resistance associated with the gate connection. A typical value is of the order of a few ohms, and its impact on static and dynamic characteristics is small. Therefore, its precise value is not important, but its presence helps avoid numerical simulation issues if the gate is driven directly by a voltage source. You can specify any positive value. The default value is 10 Ω.

Product of NPN and PNP forward current gains

This is the product of the NPN forward gain BFNPN and the PNP forward gain BFPNP. The value must be greater than one for latching to occur. The smaller the value, the larger the latching current becomes. However, latching current is primarily set by other block parameters, and the total gain has only a small effect. The default value is 10.

Ports

The block has the following ports:

G

Electrical conserving port associated with the gate.

A

Electrical conserving port associated with the anode.

K

Electrical conserving port associated with the cathode.

References

[1] G. Massobrio and P. Antognetti. Semiconductor Device Modeling with SPICE. 2nd Edition, McGraw-Hill, 1993.